1. Field of the Invention
Embodiments relate to a non-volatile memory device. More particularly, embodiments relate to a global wordline decoder for reducing an area of a non-volatile memory device and a decoding method thereof.
2. Description of the Related Art
Examples of a non-volatile memory device include a mask read-only memory (ROM), an electrically erasable programmable ROM (EEPROM), and an erasable programmable ROM (EPROM). EEPROMs are widely used for system programming requiring continuous update or for auxiliary storage. A flash EEPROM (hereinafter, referred to as a “flash memory device”) has a higher degree of integration than a conventional EEPROM, and thus typically used as a large-capacity auxiliary storage device.
Operation modes of a non-volatile memory device may be generally divided into a program mode, an erase mode, and a read mode. In the non-volatile memory device, various voltages are applied to wordlines and bitlines according to the operation modes. For instance, in the program mode, a program voltage is applied to a selected wordline and another voltage is applied to non-selected wordlines.
In order to selectively apply these voltages to wordlines, a plurality of switch elements (for example, switching transistors) are needed in a wordline decoder. For instance, as many switching transistors as the number of wordlines are required, and a large layout area for the switching transistors is required in the wordline decoder. Accordingly, an approach for reducing the layout area by reducing the number of switching transistors in the wordline decoder is desired.